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  *common to substrate and case refer to jan38510 information, military section d 1 s 1 nc dual-in-line in 1 d 3 v s 3 v r s 4 v l d 4 v+ nc in 2 d 2 s 2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view flat package s 4 s 3 d 4 d 3 d 2 d 1 s 2 s 1 in 2 in 1 v+ v* v l v r 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg183/184/185 vishay siliconix document number: 70032 s-52895erev. d, 16-jun-97 www.vishay.com  faxback 408-970-5600 4-1 high-speed drivers and dual dpst jfet switches  
 

  constant on-resistance over entire analog range  low leakage  low crosstalk  break-before-make switching  rad hardness  low distortion  eliminates large signal errors  high precision  improved channel isolation  eliminates inadvertent shorting between channels  fault protection  audio switching  precision switching  video switching  video routing  sample/hold  aerospace 

 the dg183/184/185 are precision dual double-pole, single-throw (dpst) analog switches designed to provide accurate switching of video and audio signals. this series is ideally suited for applications requiring a constant on-resistance over the entire analog range. the major difference in the devices is the on-resistance (dg183e10  , dg184e30  , dg185e75  reduced errors are achieved through low leakage current (i d(on) < 2 na). applications which benefit from the flat jfet on-resistance include audio switching, video switching, and data acquisition. to achieve fast and accurate switch performance, each device comprises four n-channel jfet transistors and a ttl compatible bipolar driver. in the on state, each switch conducts current equally well in either direction. in the off condition, the switches will block up to 20 v peak-to-peak, with feedthrough of less than 60 db at 10 mhz. 
   
  
 

    logic switch 0 off 1 on logic a 0 o  0.8 v logic a0o  0 . 8 v logic a 1 o  20v l og i c a1o  2 . 0 v
dg183/184/185 vishay siliconix www.vishay.com  faxback 408-970-5600 4-2 document number: 70032 s-52895erev. d, 16-jun-97  
   temp range package part number 25 to 85  c 16 - pin sidebraze dg183bp 25 to 85  c 16 - pin sidebraze dg184bp 55 125 c 16 pi sid b dg183ap/883 55 125 c 16-pin sidebraze dg184ap/883, jm38510/11103bea 55 to 125  c dg185ap/883, jm38510/11104bea 14 - pin flat pack jm38510/11103bxa 14 - pin flat pack jm38510/11104bxa      
 v+ to v 36 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v+ to v d 33 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v d to v 33 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v d to v d  22 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v l to v 36 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v l to v in 8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v l to v r 8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v in to v r 8 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v r to v 27 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v r to v in 2 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current (s or d) dg183 200 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current (s or d) dg184, dg185 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current (all other pins) 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature 65 to 150  c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation a 16-pin sidebraze b 900 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-pin flat pack c 900 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. all leads welded or soldered to pc board. b. derate 12 mw/  c above 75  c c. derate 10 mw/  c above 75  c     
      figure 1. v r v l v+ s in d v
dg183/184/185 vishay siliconix document number: 70032 s-52895erev. d, 16-jun-97 www.vishay.com  faxback 408-970-5600 4-3      
 test conditions unless specified a suffix 55 to 125  c b suffix 25 to 85  c parameter symbol v+ = 15 v, v = 15 v, v l = 5 v v r = 0 v, v in = 0.8 v or 2 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full 7.5 15 7.5 15 v drain-source on-resistance r ds(on) i s = 10 ma, v d = 7.5 v room full 7.5 10 20 15 25  source off lk c t i s(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.05 10 1000 15 300 a leakage current i s(off) v s =  7.5 v, v d =  7.5 v room hot 0.05 10 1000 15 300 a drain off lk c t i d(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.04 10 1000 15 300 na leakage current i d(off) v s =  7.5 v, v d =  7.5 v room hot 0.03 10 1000 15 300 channel on leakage current i d(on) v d = v s =  7.5 v room hot 0.1 2 200 10 200 saturation drain current i dss 2 ms pulse duration room 300 ma digital input input current with input voltage high i inh v in = 5 v room hot <0.01 10 20 10 20  a input current with input voltage low i inl v in = 0 v full 30 250 250  a dynamic characteristics turn-on time t on see switching time test circuit room 240 400 600 ns turn-off time t off see switching t ime t est circuit room 140 200 220 ns source-off capacitance c s(off) f1mh v s = 5 v, i d = 0 room 21 drain-off capacitance c d(off) f = 1 mhz v d = 5 v, i s = 0 room 17 pf channel-on capacitance c d(on) v d = v s = 0 v room 17 off isolation oirr f = 1 mhz, r l = 75  room >55 db power supplies positive supply current i+ v0v5v room 0.6 1.5 1.5 a negative supply current i v in = 0 v , or 5 v room 2.7 5 5 ma logic supply current i l v in = 0 v , or 5 v room 3.1 4.5 4.5 ma reference supply current i r room 1 2 2 notes: a. refer to process option flowchart. b. room = 25  c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg183/184/185 vishay siliconix www.vishay.com  faxback 408-970-5600 4-4 document number: 70032 s-52895erev. d, 16-jun-97      
 test conditions unless specified a suffix 55 to 125  c b suffix 25 to 85  c parameter symbol v+ = 15 v, v = 15 v, v l = 5 v v r = 0 v, v in = 0.8 v or 2 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full 7.5 15 7.5 15 v drain-source on-resistance r ds(on) i s = 10 ma, v d = 7.5 v room full 22 30 60 50 75  source off lk c t i s(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.06 1 100 5 100 a leakage current i s(off) v s =  7.5 v, v d =  7.5 v room hot 0.05 1 100 5 100 a drain off lk c t i d(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.4 1 100 5 100 na leakage current i d(off) v s =  7.5 v, v d =  7.5 v room hot 0.3 1 100 5 100 channel on leakage current i d(on) v d = v s =  7.5 v room hot 0.02 2 200 10 200 digital input input current with input voltage high i inh v in = 5 v room hot <0.01 10 20 10 20  a input current with input voltage low i inl v in = 0 v full 30 250 250  a dynamic characteristics turn-on time t on see switching time test circuit room 85 150 180 ns turn-off time t off see switching t ime t est circuit room 95 130 150 ns source-off capacitance c s(off) f1mh v s = 5 v, i d = 0 room 9 f drain-off capacitance c d(off) f = 1 mhz v d = 5 v, i s = 0 room 6 pf channel-on capacitance c d(on) v d = v s = 0 v room 14 off isolation oirr f = 1 mhz, r l = 75  room >50 db power supplies positive supply current i+ v0v5v room 0.6 3 3 a negative supply current i v in = 0 v , or 5 v room 2.7 5.5 5.5 ma logic supply current i l v in = 0 v , or 5 v room 3.1 4.5 4.5 ma reference supply current i r room 1 2 2 notes: a. refer to process option flowchart. b. room = 25  c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg183/184/185 vishay siliconix document number: 70032 s-52895erev. d, 16-jun-97 www.vishay.com  faxback 408-970-5600 4-5      
 test conditions unless otherwise specified a suffix 55 to 125  c b suffix 25 to 85  c parameter symbol v+ = 15 v, v = 15 v, v l = 5 v v r = 0 v, v in = 0.8 v or 2 v f temp b typ c min d max d min d max d unit analog switch analog signal range e v analog full 10 15 10 15 v drain-source on-resistance r ds(on) i s = 10 ma, v d = 7.5 v room full 35 75 150 100 150  source off lk c t i s(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.05 1 100 5 100 a leakage current i s(off) v s =  10 v, v d =  10 v room hot 0.07 1 100 5 100 a drain off lk c t i d(off) v s =  10 v, v d =  10 v v+ = 10 v, v = 20 v room hot 0.4 1 100 5 100 na leakage current i d(off) v s =  10 v, v d =  10 v room hot 0.3 1 100 5 100 channel on leakage current i d(on) v d = v s =  10 v room hot 0.03 2 200 10 200 digital input input current with input voltage high i inh v in = 5 v room hot <0.01 10 20 10 20  a input current with input voltage low i inl v in = 0 v full 30 250 250  a dynamic characteristics turn-on time t on see switching time test circuit room 120 250 300 ns turn-off time t off s ee s w it c hi ng t i me t es t ci rcu it room 100 130 150 ns source-off capacitance c s(off) f1mh v s = 5 v, i d = 0 room 9 f drain-off capacitance c d(off) f = 1 mhz v d = 5 v, i s = 0 room 6 pf channel-on capacitance c d(on) v d = v s = 0 v room 14 off isolation oirr f = 1 mhz, r l = 75  room >50 db power supplies positive supply current i+ v0v5v room 0.6 3 3 a negative supply current i v in = 0 v , or 5 v room 2.7 5.5 5.5 ma logic supply current i l v in = 0 v , or 5 v room 3.1 4.5 4.5 ma reference supply current i r room 1 2 2 notes: a. refer to process option flowchart. b. room = 25  c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg183/184/185 vishay siliconix www.vishay.com  faxback 408-970-5600 4-6 document number: 70032 s-52895erev. d, 16-jun-97   
           , i, i+, i (ma) i lr i in vs. v in and temperature supply current vs. temperature temperature (  c) temperature (  c) a) i in (m 5 4 3 2 1 0 55 35 15 5 25 45 65 85 105 125 0 100 80 60 40 20 55 35 15 5 25 45 65 85 105 125 i l i+ i r i i inl i inh v inl = 0 v inh = 5 v switching time vs. v d and temperature (dg183) r ds(on) vs. temperature leakage vs. temperature (dg183) switching time vs. v d and temperature (dg184/185) (ns) t on ,t off (na) i , i sd temperature (  c) r ds(on) ()  (ns) t on ,t off temperature (  c) temperature (  c) temperature (  c) 100 1 50 25 0 25 50 75 100 125 10 230 90 55 35 15 5 25 45 65 85 105 125 210 190 170 150 130 110 v d = 7.5 v i s = 10 ma t off t on dg183 dg184 dg185 100 0.1 25 45 65 85 105 125 10 1 i d(on) i d(off) i s(off) v+ = 10 v v = 20 v v l = 5 v v r = 0 130 50 55 35 15 5 25 45 65 85 105 125 120 110 100 90 80 70 60 t off t on v d = 7.5 v v d = 7.5 v v d = 7.5 v v d = 7.5 v
dg183/184/185 vishay siliconix document number: 70032 s-52895erev. d, 16-jun-97 www.vishay.com  faxback 408-970-5600 4-7   
           i d(off) vs. temperature (dg184/185) (na) i d temperature (  c) 100 10 1 0.1 25 45 65 85 105 125 b suffix a suffix capacitance vs. v d or v s (dg183) v d or v s drain or source voltage (v) (pf) c s, d 30 26 22 18 14 10 8 4 0 4 8 c d(off) c s(off) c d(on) f = 1 mhz off isolation vs. frequency capacitance vs. v d or v s (dg184/185) v d or v s drain or source voltage (v) f frequency (hz) iso (db) (pf) c s, d 100 90 80 70 60 50 40 30 20 10 0 10 5 10 6 10 7 10 8 v+ = 15 v, v = 15 v v r = 0, v l = 5 v r l = 75  v in  220 mv rms dg183 dg184/185 20 18 16 14 12 10 8 6 4 2 0 10 8 6 4 2 0 2 4 6 8 10 c d(off) c s(off) c d(on) capacitance is measured from test terminal to common. v inl = 0.8 v v inh = 2 v f = 1 mhz v+ = 10 v, v = 20 v v d = 10 v, v s = 10 v
dg183/184/185 vishay siliconix www.vishay.com  faxback 408-970-5600 4-8 document number: 70032 s-52895erev. d, 16-jun-97    feedthrough due to charge injection may result in spikes at the leading and trailing edge of the output waveform. figure 2. switching time logic input switch output t off t on t r <10 ns t f <10 ns 90% 50% 0 v 3 v 0 v 0 v 90% 3 v 3 v t on : v s = 3 v t off :v s = 3 v v out  v s x r l r l  r ds(on) 15 v gnd in c l (includes fixture and stray capacitance) v d 1 v o1 s 2 s 1 d 2 r l2 c l2 v o2 r l1 c l1 v s2 v s1 +15 v v+ +5 v v l 
     switch v+ positive supply voltage (v) v negative supply voltage (v) v l logic supply voltage (v) v r reference supply voltage (v) v in logic input voltage v inh(min) /v inl(max) (v) v s analog voltage range (v) dg183 dg184 15 b 10 12 15 20 12 5 5 5 gnd gnd gnd 2.0/0.8 2.0/0.8 2.0/0.8 7.5 to 15 12.5 to 10 4.5 to 12 dg185 15 b 10 12 15 20 12 5 5 5 gnd gnd gnd 2.0/0.8 2.0/0.8 2.0/0.8 10 to 15 15 to 10 7 to 12 notes: a. application hints are for design aid only, not guaranteed and not subject to production testing. b. electrical parameter chart based on v+ = 15 v, v l = 5 v, v r = gnd.
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.


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